Magnetic random access memory (MRAM) is a type of non-volatile magnetic memory which includes magnetic memory cells. A typical magnetic memory cell includes a layer of magnetic film in which the magnetization of the magnetic film is alterable and a layer of magnetic film in which magnetization is fixed or “pinned” in a particular direction. The magnetic film having alterable magnetization is typically referred to as a data storage layer, and the magnetic film which is pinned is typically referred to as a reference layer.
A typical magnetic memory includes an array of magnetic memory cells. Word lines extend along rows of the magnetic memory cells, and bit lines extend along columns of the magnetic memory cells. Each magnetic memory cell is located at an intersection of a word line and a bit line. A magnetic memory cell is usually written to a desired logic state by applying external magnetic fields that rotate the orientation of magnetization in its data storage layer. The logic state of a magnetic memory cell is indicated by its resistance state which depends on the relative orientations of magnetization in its data storage and reference layers. A sense amplifier is used to sense the resistance state of a selected magnetic memory cell to determine the logic state stored in the memory cell. The resistance state can be sensed by applying a voltage to a selected memory cell and measuring a sense current that flows through the memory cell. Ideally, the resistance is proportional to the sense current.
Sensing the resistance state of a single memory cell in the array can be unreliable. The memory cells in the array are coupled together through many parallel paths. The resistance at one cross point equals the resistance of the memory cell at that cross point in parallel with resistances of memory cells in the other word lines and bit lines. Memory cells located along the same word line or bit line typically each see similar resistances.
Various approaches have been proposed to calibrate magnetic memory read circuits to help minimize the effect of these parasitic resistances. Typically these approaches perform a calibration by measuring correction parameters for a memory cell at a particular location within the array of memory cells. The measured correction parameters are then applied to other memory cell locations across the array. While these approaches can improve the reliability of sensing a memory cell in the array, the variation of the parasitic resistances and currents across the array, and especially between different bit lines, can still cause result in unreliable read operations.